Motorola 88110 CPU

Used in

The 88110 was the second generation member of the 88000 family and the direct successor to the 88100 CPU. It basically integrated the functions of the 88100 CPU and the 88200 CMMU into one single chip. Supposedly three to five times faster than its predecessor, it featured several enhancements to the architecture besides the above-mentioned chip-integration.

It is the first superscalar implementation of the m88k architecture. A FP register-file and new graphics instructions were introduced. Up to two instructions can be dispatched to the ten functional units, stores and branches can be issued out-of-order, the instruction path is speculatively executed beyond conditional branches. All functional units, except the divide unit, are able to receive a new instruction every single clock cycle. The instruction unit of the 88110 is the main unit which controls the instruction and data flow; it performs fetching, decoding and issueing of the instructions and is able to process two instructions on every cycle.

Three types of system configurations were targeted:

  1. Single-processor, closely coupled to DRAM.
  2. Dual-processor, also closely coupled to DRAM. Variants should have included both SMP style arrangemants or AMP, so that one 88110 is a dedicated processor for particular functions, as e.g. graphics or DSP.
  3. Medium-scale shared-memory multiprocessor systems with big local L2 caches.



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